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FEDL6606-03 Semiconductor
FEDL6606-03 This version: Sep. 2000 MSM6606 Previous version: Nov.1992 June 1997
Semiconductor MSM6606
80-DOT LCD DRIVER WITH KEY MATRIX
GENERAL DESCRIPTION
The MSM6606 is an LCD driver for a 1/2 duty dynamic display. It can directly drive an LCD of up to 80 segments, and one LED. Keyboard input is now available by the internal 5 x 6 keyscan circuit, and the number of wires between the front panel and the CPU can be minimized.
FEATURES
* * * * * * * * * Power supply voltage : 5V 10% Temperature range : -40 to +85C Can display an LCD of up to 80 segments (1/2 duty dynamic drive) Can directly drive one LED (IO = -15 mA max.) Internal 5 x 6 keyscan circuit allows reading of the status of up to 30 key switches A serial interface with the CPU is implemented by LOAD, DATA I/O, and CLOCK Built-in RC oscillation circuit for LCD alternating current drive Built-in voltage dividing resistor for bias voltage generation Package: 64-pin plastic QFP (QFP64-P-1414-0.80-BK) (Product name : MSM6606GS-BK)
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FEDL6606-03 Semiconductor MSM6606
BLOCK DIAGRAM
SEG1
SEG40
LED1
BLANK 40-DOT SEGMENT DRIVER
LED DRIVER
TIMING GEN. 40-BIT DATA SELECTOR
COMMON DRIVER
COM-A COM-B
OSC
OSC
(DATA LATCH A) 41-BIT LATCH
(DATA LATCH B) 40-BIT LATCH VDD VSS
RESET
MODE SELECTOR
TEST
C3 C2 C1 C0 LOAD CONTROL LOGIC 56 KEY SCANNER (41+4) 45-BIT SHIFT REGISTER
DATA I/O CLOCK
INT
C0 C1 C2 C3 C4 C5
R0 R1 R2 R3 R4
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Semiconductor
PIN CONFIGURATION (TOP VIEW)
SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9
SEG10 10 SEG11 11
,
59 DATA I/O 64 COM-A 63 COM-B 61 BLANK 62 RESET 60 INT
FEDL6606-03 MSM6606
58 CLOCK
57 LOAD
52 LED1
56 TEST
54 OSC
53 VDD
55 VSS
51 R4
50 R3
49 R2
1 2 3 4 5 6 7 8 9
48 R1 47 R0 46 C5 45 C4 44 C3 43 C2 42 C1 41 C0 40 SEG40 39 SEG39 38 SEG38 37 SEG37 36 SEG36 35 SEG35 34 SEG34 33 SEG33
SEG12 12 SEG13 13 SEG14 14 SEG15 15 SEG16 16
SEG17 17 SEG18 18 SEG19 19 SEG20 20 SEG21 21 SEG22 22 SEG23 23 SEG24 24 SEG25 25 SEG26 26 SEG27 27 SEG28 28 SEG29 29 SEG30 30 SEG31 31 SEG32 32
64-Pin Plastic QFP
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FEDL6606-03 Semiconductor MSM6606
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Input Voltage Output Current Storage Temperature Symbol VDD VI IO TSTG Condition Ta = 25C Ta = 25C Ta = 25C -- *1 Rating -0.3 to +6.5 -0.3 to VDD+0.3 -20 -55 to +150 Unit V V mA C
*1 Applicable to LED1
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Operating Temperature Symbol VDD Top Condition -- -- Range 4.5 to 5.5 -40 to +85 Unit V C
Recommended Oscillation Circuit Conditions
Parameter Oscillation Resistance Oscillation Capacitance Symbol RO CO Condition -- -- Min. 20 0.01 Max. 120 0.047 Unit kW mF
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FEDL6606-03 Semiconductor MSM6606
ELECTRICAL CHARACTERISTICS
DC Characteristics
Parameter "H" Input Voltage "L" Input Voltage "H" Input Current "L" Input Current "H" Input Current "L" Input Current "L" Input Current "L" Input Current "H" Output Voltage "L" Output Voltage "H" Output Voltage "L" Output Voltage "H" Output Voltage "L" Output Voltage "H" Output Voltage "L" Output Voltage "H" Output Voltage "L" Output Voltage "M" Output Voltage "M" Output Resistance Supply Current Symbol VIH VIL IIH1 IIL1 IIH2 IIL2 IIL3 IIL4 VOH1 VOL1 VOH2 VOL2 VOH3 VOL3 VOH4 VOL4 VOH5 VOL5 VOM ROM IDD Condition -- -- VDD = 5.5V, VI = VDD VDD = 5.5V, VI = 0V VDD = 5.5V, VI = VDD VDD = 5.5V, VI = 0V VDD = 5.0V, VI = 0V VDD = 5.0V, VI = 0V VDD = 4.5V, IO = -30mA VDD = 4.5V, IO = 30mA VDD = 4.5V, IO = -150mA VDD = 4.5V, IO = 150mA VDD = 4.5V, IO = -15mA VDD = 4.5V, IO = 0.1mA VDD = 4.5V, IO = -0.4mA VDD = 4.5V, IO = 0.4mA VDD = 4.5V, IO = -50mA VDD = 4.5V, IO = 1.0mA VDD = 4.5V, IO = 0mA VDD = 4.5V, IO = 10mA *1 VDD = 5.5V, no load *2 Min. 0.7VDD VSS -- -- -- -- -0.18 -0.02 4.3 -- 4.3 -- 3.0 -- 4.1 -- 2.5 -- 2.15 -- -- (VDD = 5V 10%, Ta = -40 to +85C) Max. VDD 0.3VDD 1 -1 10 -10 -0.8 -0.1 -- 0.2 -- 0.2 -- 0.4 -- 0.4 -- 0.4 2.35 100 0.5 Unit V V mA mA mA mA mA mA V V V V V V V V V V V kW mA Applicable Pin All inputs CLOCK, LOAD BLANK DATA I/O C0 - C5 RESET SEG1 SEG40 COM-A COM-B LED1 DATA I/O INT R0 - R4 COM-A COM-B VDD
*1 ROM = (VO - VOM)/IO *2 VIH = VDD, VIL = 0 V, fOSC = 3.2 kHz
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FEDL6606-03 Semiconductor Switching Characteristics
(VDD = 5V 10%, Ta = -40 to +85C) Parameter Clock Frequency Clock Pulse Width Rise/Fall Time Data Setup Time Data Hold Time Load Pulse Width ClockAELoad Time LoadAEClock Time Output Delay Time 1 Output Delay Time 2 Symbol fCP tWCP tr, tf tDSU tDHD tWLD tCL tLC tPD1 tPD2 Condition -- -- -- -- -- -- -- -- CL = 50pF -- Min. -- 200 -- 100 100 200 100 200 -- -- Max. 2.0 -- 50 -- -- -- -- -- 300 300 Unit MHz ns ns ns ns ns ns ns ns ns
MSM6606
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FEDL6606-03 Semiconductor MSM6606
tWCP tr
0.8VDD
tWCP tf
0.2VDD
0.8VDD 0.2VDD
CLOCK
1/fCP tDSU tDHD DATA I/O 0.8VDD 0.2VDD (During input mode) tWLD tCL LOAD
0.8VDD 0.2VDD
tLC
tPD1 DATA I/O (When changing from input mode to output mode) HiZ 0.8VDD 0.2VDD tPD2 DATA I/O (When changing from output mode to input mode) HiZ
tPD1
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FEDL6606-03 Semiconductor MSM6606
FUNCTIONAL DESCRIPTION
Pin Functional Description * OSC This is an input pin for the oscillator to generate LCD display and keyscan signals. Connect an external capacitor and a resistor as shown below to form an RC oscillation circuit. The relationship between frame frequency fFRM, keyscan period TSCN, and oscillation frequency fOSC is: TSCN = 15/fOSC, fFRM = fOSC/32 (See the reference data for information on relationship between CO and RO values, and frame frequency or keyscan periods.)
VDD RO OSC CO
* Data I/O This is a serial data input/output. The pin is in output state from the first shift clock rise after "Key Data Output" command writing, to the load signal rise, and in input state otherwise. (The pin is in input state after reset.) The relationship between the data level and operation is as shown below:
Level "H" "L" Display ON OFF Key Status ON (close) OFF (open)
* CLOCK This is an input pin for the shift clock. DATA I/O pin data is either input or output in synchronization with the rising edge of the clock. * LOAD This is a load signal input pin used to transfer serial input data to a latch for display, to write commands, or to reset the DATA I/O pin to an input state. * BLANK This is a display blanking signal input pin. At "H" level the LED and LCD displays go out regardless of the display data. The display returns to the original status at "L" level.
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FEDL6606-03 Semiconductor MSM6606
* R0 - R4 These are keyswitch scan signal output pins. During the scan operating, "L" level is output in the order of R0, R1, ..., R4. All signals go to "L" level when scanning stops. * C0 - C5 These are input pins that detect the key status. A pull-up resistor is built in. Key matrices are formed with R0 - R4 pins.
C0
C1
C2
C3
C4
C5
R0 R1 R2 R3 R4
* INT This is the keyscan end signal output pin. This pin becomes "H" level when one scan cycle ends, and returns to "L" level by a load signal after data is output or the "Key Scan Stop" command is written. (This pin goes to "L" level at reset.)
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FEDL6606-03 Semiconductor MSM6606
* RESET This is the reset signal input pin that initializes the IC, and it is activated at "L" level. A pullup resistor is built in. The power ON reset operation is performed by externally connecting a capacitor.
VDD
RESET
* SEG1 - SEG40 These are the output pins for the LCD display, and are connected to the segment pins of the LCD panel. See the section on data configuration for the relationship between the SEG output and input data. * COM-A, COM-B These are output pins for the LCD display and are connected to the common pins of the LCD panel. * LED1 This is an output pin for the LED drive. A LED and a current limiting resistor are externally connected.
LED1
* TEST This is an input pin for IC testing. This pin should be connected to VSS. * VDD, VSS These are power supply voltage and ground pins, respectively.
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FEDL6606-03 Semiconductor Operational Description * Display data input As shown in the section on data configuration, the data for display consists of a data field corresponding to segments ON/OFF and a command field indicating display data input. The C0 bit of the command field is set to "0" (common A) or "1" (common B) according to the common corresponding to the display data. LED display data corresponds to common A. Data input to the DATA I/O pin is captured by a shift register at rising edge of a clock signal, then is transferred to a data latch for display when the LOAD signal is at "H" level, and is output through a segment driver. MSM6606
CLOCK
,,, ,,,
DATA I/O
,,, ,,, ,,
D1
D2
D3
D4
D40 D41
C0
C1
C2
C3
,,, ,,, ,,,
,,,
,,,
,,,
,,,
LOAD Display Output
,,, ,,, ,,, ,,, ,,, ,,,
,,,
,,, ,,,
,,,
,,,
,,
,,
,, ,,,
,,,
,,,
Old Data
New Data
* Key data output The status of a key switch is indicated by ON = 1, OFF = 0, and is read as 30-bit serial data. (For information on the sequence, see the section on data configuration.) To output data, first write the "Key Data Output" command, then apply a clock signal. Data is then output synchronizing with the rising edge of the clock signal. After that, when a LOAD pulse is added, the DATA I/O pin returns to the input state, and the next data or command can be input.
CLOCK
DATAI/O
C1
C2
C3
,,, ,,, ,,, ,,, ,,, ,,,
01
02
03
029
030
LOAD
,,,
,,,
,
Output Command Write
Key Data Read
Next Command Input
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FEDL6606-03 Semiconductor * Keyscan Keyscan starts when the key status has changed, or when the "Key Scan Start" command has been written. Scan continues until the "Key Scan Stop" command is written. (Scan stops when a reset signal is applied.) When 1 keyscan cycle (TSCN) ends, the INT signal becomes "H", so this signal can be used as an interrupt flag, which is dependent on switcing conditions of keys. The INT signal is reset when either the LOAD pulse is input after the key data is output, when the "Key Scan Stop" command is set, or when a reset signal is applied.
TSCN
MSM6606
R0
R1
R2
R3
R4
INT
Key Scan Start Command Write, or Key Status Changed
Data Read
Key Scan Stop Command Write
Notes:
1. A recognition error (a switch that was actually not pressed is recognized as having been pressed) may occur if 3 or more key switches are pressed at the same time. If simultaneous pressing of 3 or more key switches needs recognizing, serially insert diodes into each switch. If pressing 3 or more key switches at the same time is not allowed, a possible software approach is to ignore the read data when there are 3 or more 1s in the key data. 2. A change of key status is detected as a change of column inputs (C0 - C5). Therefore if multiple switches which are connected to the same column are pressed at the same time, a change of key status will not be detected.
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FEDL6606-03 Semiconductor LCD Drive Waveform MSM6606
VDD COM-A 1/2VDD VSS
VDD COM-B 1/2VDD VSS
VDD
VSS OFF OFF OFF OFF
OFF SEGn
ON
OFF
ON
ON
OFF
ON
OFF
ON
ON
ON
ON
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FEDL6606-03 Semiconductor Commands List MSM6606
Command F1 F2 F3 F4 F5 F6
C3 0 0 0 1 1 1
C2 0 1 1 1 0 1
C1 1 0 1 0 0 1
C0 0 1 x 0 1 x x x
Operation Display Data Input (Corresponding to common A) Display Data Input (Corresponding to common B) Key Data Output Display Data Input (A) + Key Data Output Display Data Input (B) + Key Data Output Key Scan Stop + Key Data Output Key Scan Stop Key Scan Start + Key Data Output x : Don't care
Data Configuration [Input Data]
Last Bit
Corresponds to SEG 1 Corresponds to SEG 40
First Bit
CCCCDDDDDD 3 2 1 0 41 40 39 38 37 36
DDDDDD 654321
Command
LCD Display Data
LED Display Data
Note 1: LED data corresponds to common A side (C0 = 0). Note 2: D1 bit is unnecessary when LED output is not used. Note 3: Commands F2, F4-F6 become effective if at least 3 bits (C1-C3) are input (D1-D41, C0 bits are not necessary). Note 4: If dummy bits are necessary, add them before first bit.
[Output Data]
Last Bit 030 R4 R3 R2 R1 R0 01 First Bit
C5 C4 C3 C2 C1 C0 C5 C4 C3 C2 C1 C0 C5 C4 C3 C2 C1 C0 C5 C4 C3 C2 C1 C0 C5 C4 C3 C2 C1 C0
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FEDL6606-03 Semiconductor MSM6606
APPLICATION CIRCUIT
1/2 Duty LCD Panel SEG1 SEG40
COM-A COM-B
SEG1
SEG40 COM-A
LOAD DATA I/O CPU CLOCK INT BLANK RESET C0 C1 C2 C3 C4 C5 R0 R1 R2 R3 R4 MSM6606
COM-B LED1 VDD OSC VSS TEST +5V
5 x 6 Key Matrix
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FEDL6606-03 Semiconductor MSM6606
REFERENCE DATA
fFRM, TSCN vs. RO, CO
fFRM [Hz] 500 VDD= 5.0V Ta=25C 2 200 150 100 CO= 0.01mF 3 4 5 6 8 10 CO= 0.022mF 30 20 CO= 0.033mF TSCN [ms]
300
50
20
40
60 RO [kW]
80
100
120
The frequency changes depending on supply voltages and temperatures. For VDD, the frequency becomes about 5% higher at 50.5V than at 5V. For temperature, the frequency becomes about 12% higher at Ta=-40C and becomes about 10% lower at Ta=85C than at Ta=25C. (The temperature characteristic of an external resistor and capacitor is not taken into consideration here.)
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FEDL6606-03 Semiconductor MSM6606
PACKAGE DIMENSIONS
(Unit : mm)
QFP64-P-1414-0.80-BK
Oki Electric Industry Co., Ltd.
Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised
Epoxy resin 42 alloy Solder plating (5 mm) 0.87 TYP. 5/Sep. 21, 1999
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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FEDL6606-03 Semiconductor MSM6606
NOTICE
1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. Neither indemnity against nor license of a third party's industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party's right which may result from the use thereof. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. No part of the contents contained herein may be reprinted or reproduced without our prior permission. MS-DOS is a registered trademark of Microsoft Corporation.
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Copyright 2000 Oki Electric Industry Co., Ltd.
Printed in Japan
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